A semiconductor chip of this kind is known from the article by Song Jae Lee and Seok Won Song, “Efficiency Improvement in Light-Emitting Diodes Based on Geometrically Deformed Chips,” SPIE Conference on Light-Emitting Diodes: Research, Manufacturing and Applications III, San Jose, Calif., January 1999, pages 237-248. The semiconductor body of a semiconductor chip described therein comprises a bottom cover layer, an active region and a top cover layer. In one embodiment, the semiconductor chip is realized in the shape of a prism with a lozenge as its base. With such a lozenge-shaped plan, the beams of light emanating from the active region strike a lateral surface, at least after some total reflections from the lateral surfaces, at an angle that is smaller than the critical angle for total reflection. The light output is limited substantially by absorption in the semiconductor chip.
Problems arise with the known semiconductor chips when they are used for high luminous efficiencies. High luminous efficiencies presuppose high electrical currents through the semiconductor chip. In this situation, there is a nonlinear relationship between the luminous efficiency and the required current intensity. That is, the required current intensity increases disproportionately with the luminous efficiency. The heat generated per surface unit of cross-sectional area therefore increases disproportionately with increasing luminous efficiency of the semiconductor chip. To limit thermal loading, it is therefore necessary to reduce the current density by increasing the cross-sectional area. Thus, semiconductor chips of high luminous efficiency usually have particularly large cross-sectional areas.
However, assuming that the thickness of the semiconductor chip is unchanged, this causes the lateral surfaces of the semiconductor chip to appear to be at a smaller solid angle when viewed from a light-generating light spot in the active region. Thus, in percentage terms, fewer beams of light strike the lateral surfaces of the semiconductor chip directly. Of course, this can theoretically be corrected by scaling the thickness of the semiconductor chip to its cross-sectional dimensions, which would again yield large lateral surfaces. For reasons of process technology, this is difficult to do, however. In addition, substrates, for example, can be obtained only in specific, predetermined layer thicknesses.